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Since: Apr 27, 2006 Posts: 1
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(Msg. 1) Posted: Thu Apr 27, 2006 11:49 pm
Post subject: Circuit Design / IO / ASIC Openings with SanDisk India Archived from groups: misc>jobs>resumes (more info?)
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Hi,
Please find the various openings in SanDisk India. Please go through it
and let me know if you are interested.
Please forward the mail to your friends who might be interested to
explore possibilities with SanDisk.
--
With Best Regards
Subodh Prakash Taigor
Design Engineer
SanDisk India Device Design Centre Pvt. Ltd.
Contact: 9448379908
Job Requirements
Job Description for NAND Design Engineer-I
Education Requirements/Preference:
ï‚· Bachelors or Masters degree in Electrical/Electronics
Engineering from a reputed Institute (IIT, REC, Anna University, BITS
etc…)
Years Experience:
1-2 Years in CMOS Analog Circuit Design, preferably in Non-Volatile
Memory design
Thorough understanding in MOS device physics and interaction between
design, device, reliability and process is a MUST
Skilled in validating on silicon using lab equipments
Experience in CAD Tools. Simulation tools (HSPICE, Verilog, Powermill
and HSIM), Schematic/Layout tools (OPUS) and Post-processing Tools
Solid knowledge in Integrated circuit layout rules
Prior experience in a MNC in India or in abroad
Good written and verbal communication skills
Tasks to be performed & areas of responsibility (include physical
aspects of the job):
Successful candidates will work with the Flash design team in Sunnyvale
to architect, design and develop NAND based Flash memory products
utilizing state of the art non-volatile technologies.
In this highly visible role you will perform the following duties:
Design, simulate, and verify critical circuits using simulation tools.
Be a technical mentor to guide, and lead other hardware design
engineers in problem solving, as well as planning.
Document and present new architectures, new and enhanced circuit
designs, and simulation results during design reviews.
Work with layout engineers and closely interact with them during the
design phase by reviewing their layout and providing input as needed.
Verify and characterize silicon using lab equipments and testers.
Propose innovative circuit solutions and design methodologies.
Job Description for NAND Design Engineer-II
Education Requirements/Preference:
ï‚· Bachelors or Masters degree in Electrical/Electronics
Engineering from a reputed Institute (IIT, REC, Anna University, BITS
etc…)
Years Experience:
2-4 Years in CMOS Analog Circuit Design, preferably in Non-Volatile
Memory design
Thorough understanding in MOS device physics and interaction between
design, device, reliability and process is a MUST
Skilled in validating on silicon using lab equipments
Experience in CAD Tools. Simulation tools (HSPICE, Verilog, Powermill
and HSIM), Schematic/Layout tools (OPUS) and Post-processing Tools
Solid knowledge in Integrated circuit layout rules
Prior experience in a MNC in India or in abroad
Good written and verbal communication skills
Tasks to be performed & areas of responsibility (include physical
aspects of the job):
Successful candidates will work with the Flash design team in Sunnyvale
to architect, design and develop NAND based Flash memory products
utilizing state of the art non-volatile technologies.
In this highly visible role you will perform the following duties:
Design, simulate, and verify critical circuits using simulation tools.
Be a technical mentor to guide, and lead other hardware design
engineers in problem solving, as well as planning.
Document and present new architectures, new and enhanced circuit
designs, and simulation results during design reviews.
Work with layout engineers and closely interact with them during the
design phase by reviewing their layout and providing input as needed.
Verify and characterize silicon using lab equipments and testers.
Propose innovative circuit solutions and design methodologies.
Job description for FW Engineer-II Position
Education Requirements/Preference:
B.E. or B.Sc in Electronics or Computer Science or Computer Engineering
from premier Institute (from First Tier colleges)
Years Experience:
· 2-4 years experience in developing F/W for embedded systems.
Experience in real-time C and assembly level programming is required.
Knowledge and experience in real time embedded software design is
required.
Experience in an ASIC environment is preferred.
Good knowledge of real time operating systems.
System analysis skills.
Good verbal (English & Hebrew) and inter-personal communication skills.
Fair knowledge of SW engineering methodologies.
Tasks to be performed & areas of responsibility (include physical
aspects of the job):
F/W development and test packages verification for Security platforms
TRIPOLI / U3 / TF / GRUVI / FALCON / FCP / TALON projects.
Job description for FW Manager Position
Requirements/Preference:
B.E. or B.Sc in Electronics or Computer Science or Computer Engineering
from premier Institute (from First Tier colleges)
Manager, responsible for the following
Setting up a group of test engineers / script developers to develop
regression tests for all major modules in Sandisk firmware. This would
include BE regression test development, SCIP regression, MS/CF/USB
regression test scripts (SD is already done in SDIL). This team would
take test plan requirements documents and develop test suites.
Release of regression test suites to FW and product groups
Manage outsourced Test Software QA development and execution (RelQ)
Position would require initial 2 month trip to US, and 1 month to
Israel. Subsequently travel as necessary.
Background / Experience necessary
8-10 years of experience in Industry
Management experience in QA/Software development role
Experienced in building a team and developing processes
Experience in CMMI preferred
Job Description for NAND Manger
Education Requirements/Preference:
ï‚· Bachelors or Masters degree in Electrical/Electronics
Engineering from a reputed Institute (IIT, REC, Anna University, BITS
etc…)
Years Experience:
8 and above Years in CMOS Analog Circuit Design, preferably in
Non-Volatile Memory design
Thorough understanding in MOS device physics and interaction between
design, device, reliability and process is a MUST
Skilled in validating on silicon using lab equipments
Experience in CAD Tools. Simulation tools (HSPICE, Verilog, Powermill
and HSIM), Schematic/Layout tools (OPUS) and Post-processing Tools
Solid knowledge in Integrated circuit layout rules
Prior experience in a MNC in India or in abroad
Good written and verbal communication skills
Tasks to be performed & areas of responsibility (include physical
aspects of the job):
Successful candidates will work with the Flash design team in Sunnyvale
to architect, design and develop NAND based Flash memory products
utilizing state of the art non-volatile technologies.
In this highly visible role you will perform the following duties:
Design, simulate, and verify critical circuits using simulation tools.
Be a technical mentor to guide, and lead other hardware design
engineers in problem solving, as well as planning.
Document and present new architectures, new and enhanced circuit
designs, and simulation results during design reviews.
Work with layout engineers and closely interact with them during the
design phase by reviewing their layout and providing input as needed.
Verify and characterize silicon using lab equipments and testers.
Propose innovative circuit solutions and design methodologies.
Experienced in building a team and developing processes
Job Description for NAND Sr. Design Engineer
Education Requirements/Preference:
ï‚· Bachelors or Masters degree in Electrical/Electronics
Engineering from a reputed Institute (IIT, REC, Anna University, BITS
etc…)
Years Experience:
4-6 Years in CMOS Analog Circuit Design, preferably in Non-Volatile
Memory design
Thorough understanding in MOS device physics and interaction between
design, device, reliability and process is a MUST
Skilled in validating on silicon using lab equipments
Experience in CAD Tools. Simulation tools (HSPICE, Verilog, Powermill
and HSIM), Schematic/Layout tools (OPUS) and Post-processing Tools
Solid knowledge in Integrated circuit layout rules
Prior experience in a MNC in India or in abroad
Good written and verbal communication skills
Tasks to be performed & areas of responsibility (include physical
aspects of the job):
Successful candidates will work with the Flash design team in Sunnyvale
to architect, design and develop NAND based Flash memory products
utilizing state of the art non-volatile technologies.
In this highly visible role you will perform the following duties:
Design, simulate, and verify critical circuits using simulation tools.
Be a technical mentor to guide, and lead other hardware design
engineers in problem solving, as well as planning.
Document and present new architectures, new and enhanced circuit
designs, and simulation results during design reviews.
Work with layout engineers and closely interact with them during the
design phase by reviewing their layout and providing input as needed.
Verify and characterize silicon using lab equipments and testers.
Propose innovative circuit solutions and design methodologies.
Job description for Senior Library & I/O Design Engineer
Education
- Bachelors or Masters in Electrical or Electronics Engineering from
reputed Colleges
Experience
- 5-7 Years in ASIC Ckt. design
- Experience in Library characterization and Memory characterization
- Experience in Library Q/A flow development/checking
- Experience in dealing with Memory vendors and Std. cell vendors in
Fabless Company.
- Experience in PERL scripting
- Experience in managing 2-3 Junior Engineers
- Experience in HSPICE and desirable to have Magma CellRater experience
Pluses
- I/O Design and Development
Job Description
- Characterization/Re-characterization of Standard cell libraries from
UMC, TSMC and Tower
- Library porting from different process
- Memory characterization for SanDisk requirements
- Interface with Std. cell vendors, Memory vendors
- Library flow checking and Q/A with different cell view
- Develop scripts to maintain above flow and modify
- I/O development (Wave shaping ckts etc...used in Memory controller
ASICs)
Job Description for NAND Staff Design Engineer
Education Requirements/Preference:
ï‚· Bachelors or Masters degree in Electrical/Electronics
Engineering from a reputed Institute (IIT, REC, Anna University, BITS
etc…)
Years Experience:
6-8 Years in CMOS Analog Circuit Design, preferably in Non-Volatile
Memory design
Thorough understanding in MOS device physics and interaction between
design, device, reliability and process is a MUST
Skilled in validating on silicon using lab equipments
Experience in CAD Tools. Simulation tools (HSPICE, Verilog, Powermill
and HSIM), Schematic/Layout tools (OPUS) and Post-processing Tools
Solid knowledge in Integrated circuit layout rules
Prior experience in a MNC in India or in abroad
Good written and verbal communication skills
Tasks to be performed & areas of responsibility (include physical
aspects of the job):
Successful candidates will work with the Flash design team in Sunnyvale
to architect, design and develop NAND based Flash memory products
utilizing state of the art non-volatile technologies.
In this highly visible role you will perform the following duties:
Design, simulate, and verify critical circuits using simulation tools.
Be a technical mentor to guide, and lead other hardware design
engineers in problem solving, as well as planning.
Document and present new architectures, new and enhanced circuit
designs, and simulation results during design reviews.
Work with layout engineers and closely interact with them during the
design phase by reviewing their layout and providing input as needed.
Verify and characterize silicon using lab equipments and testers.
Propose innovative circuit solutions and design methodologies.
Experienced in Building a team and developing processes >> Stay informed about: Circuit Design / IO / ASIC Openings with SanDisk India |
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